GlobalFoundries
DFT Engineer ( Testchip Architecture/ RTL DFT)
India · Work style not stated · Full time
Posted over 6 months ago: check it’s still open
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About the role
Description from the employer’s posting. Check the employer’s page for the current version.
- EmployerGlobalFoundries
- LocationIndia
- Work styleWork style not stated
- Employment typeFull time
- Employer posted
About GlobalFoundries
GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.
Job Overview:
We are seeking a skilled DFT Engineer to lead DFT architecture and methodology development for complex test‑chip designs. The role involves defining and implementing Scan, MBIST, ATPG, and supporting post‑silicon debug activities. The engineer will collaborate with design, verification, and physical design teams to ensure seamless BIST integration and validation. Strong hands‑on experience in JTAG, Memory BIST, ATPG, SystemVerilog, and UVM is essential, along with proficiency in simulation, testbench development, and ATE pattern handling. Expertise in scripting with Tcl, Python, and Shell is required. Experience in RTL development and functional verification is a plus
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Essential Responsibilities:
- Lead the DFT architecture for test‑chip designs.
- Develop and maintain DFT methodologies for the team.
- Possess strong knowledge of MBIST, at‑speed testing, test‑clocking, and port‑mixing.
- Own and deliver test architectures including Scan, Mem‑BIST, ATPG, and provide post‑silicon support.
- Collaborate effectively with cross‑functional design, verification, and physical design teams to ensure seamless BIST integration and validation
Required Qualifications:
- BSEE/MSEE or PhD in Electrical Engineering with 7+ years of strong hands‑on experience in JTAG, Scan, Memory BIST, and ATPG
- Proficient in SystemVerilog and UVM‑based verification environments.
- Expertise with ATPG and MBIST tools, particularly Tessent (mandatory).
- Strong proficiency in testbench development, simulation, and debug.
- Experience in post‑silicon failure analysis, diagnostics, and debug.
- Ability to work with ATE patterns and perform gate‑level simulations.
- Skilled in scripting and automation using Tcl, Python, and Shell.
- Experience in RTL development and functional verification of logic circuits is an added advantage.
Preferred Qualifications:
- Experience in RTL development and functional verification of logic circuits.
- Strong communication skills and ability to work in cross-functional teams.
"GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard.
As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities.
All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations."
Information about our benefits you can find here: https://gf.com/about-us/careers/opportunities-asia
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At a glance
- Employment typeFull time
- Employer posted
- Added to ROLIVA
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Skills in this posting
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