FPGA System Design Engineer

Partner directly with strategic customers to deploy and optimize DSP, communications, AI, and signal processing algorithms on Altera FPGA devices.

Develop benchmarks, proof-of-concept demonstrations, reference designs, and complete system solutions that showcase FPGA performance and value.

Collaborate closely with FPGA software and tools teams to identify customer needs, drive tool enhancements, and influence future product features.

Analyze system-level performance and optimize FPGA implementations for throughput, latency, power, and resource utilization.

Support customer design activities including architecture reviews, debugging, performance tuning, and technical enablement.

Contribute technical collateral including design documentation, application notes, training materials, and best-practice guides.

The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.

$118.9K - $172.2K USD

We use artificial intelligence to screen, assess, or select applicants for the position.Applicants must be eligible for any required U.S. export authorizations.

Qualifications:

Required Qualifications

Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.

3+ years of experience in FPGA design and algorithm implementation.

2+ years of software development experience using C/C++.

1+ year of FPGA development experience using Verilog or VHDL.

Strong understanding of digital logic design and FPGA development methodologies.

Experience debugging and validating complex hardware/software systems.

Excellent analytical, communication, and problem-solving skills.

Security Clearance Requirement

This position may involve work on U.S. Government contracts that require access to controlled or classified information. Accordingly, all applicants must be eligible to obtain and maintain a U.S. Government security clearance as a condition of employment. Failure to obtain or maintain the required security clearance may result in the withdrawal of an employment offer or termination of employment, consistent with applicable law.

Preferred Qualifications

Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.

Hands-on experience with:

MATLAB and Simulink

C/C++ and CUDA

Verilog and/or VHDL FPGA design

Quartus® Prime and ModelSim™/Questa™ simulation tools

Real-Time Operating Systems (RTOS)

Background in one or more of the following:

Digital Signal Processing (DSP)

Signal and Image Processing

Wireless and Communication Systems

Artificial Intelligence and Deep Learning

High-speed ADC/DAC architectures

RF and Software Defined Radio (SDR) systems

Experience with FPGA SoCs, embedded processors, and heterogeneous computing architectures.

Demonstrated ability to learn new technologies quickly and work independently in a fast-paced environment.

Strong collaboration, presentation, and customer-facing communication skills.

Job Type:

Regular

Shift:

Shift 1 (United States of America)

Primary Location:

San Jose, California, United States

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.