IP RTL Design Engineer

Role and Responsibilities

Roles and Responsibilities

This position is for a Senior IP Design Engineer role at Samsung Semiconductor India Bangalore, where you will be involved in RTL design, synthesis and verification of various complex IP modules of Image Sensor products. You will be associated in the design development life cycle to support spec to tape-out defined by specific assignment. You will also be responsible for providing technical inputs or guidance to improve and adhere to hardware development and quality processes necessary to ensure the design consistently meets the required functionality, re-usability, reliability, performance and power targets to ensure Samsung Image Sensors meet their design targets.

• Architecture, Design and RTL development for Image Processing IP's.

• Technically lead various RTL modules development

• Interfacing with cross-functional teams like Algorithm, Verification and Physical Implementation

. Ensuring quality of design using Lint and CDC checks.

• Synthesis, Area and power optimization.

Necessary Skills / Attributes

• Working experience in complex IP Design

• Experience in designing and RTL coding using Verilog /System Verilog/VHDL and verifying design with module level test bench or with formal techniques.

• Design QC using lint/CDC/DFT • Compile, elaboration and simulations for QC. Experience with Xcellium/VCS, Verdi, and Spyglass.

• Understanding of image processing basics, Peripherals, Buses/Interconnects and Power Management.

• Experience in writing functional design doc and/or functional specifications.

• Experience in synthesis (Synopsys DC, RTL-A) and developing timing constraints (SDC) and Timing analysis. Experience in low power design methodologies and related power estimations, power measurements during implementation.

Experience in developing/understanding of ECOs

• Working experience in teams with collaboration of effort between Verification, Validation, Physical Design and DFT Additional Qualifications (preferred)

• Experience in RTL integration tools like Magillem is added advantage.

• Working experience in HLS tools like Stratus/Catapult would be added advantage.

Team player, can-do attitude is desirable. Passion for working on innovative technologies, eager to learn and ability to be analyse/debug designs are highly desirable.

Skills and Qualifications

Experience – 6+ years

Qualifications

• B.Tech/B.E/M.Tech/M.E

Disclaimer

Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.

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