Cadence

Lead Physical Design Engineer

China · Work style not stated · Full time

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About the role

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  • EmployerCadence
  • LocationChina
  • Work styleWork style not stated
  • Employment typeFull time
  • Employer posted

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Physical Implementation Engineer

Job Description:

- A role of block/chip level physical design engineer;

- Job content includes:

- Physical Design, including: floorplan, placement, CTS, routing, etc. ;

- Physical Verification;

- Static Timing Analysis;

- EM/IR Analysis.

Job Qualification:

- Rich knowledge of the design rule for the process of N28/N16 and below;

- Ability of fixing the physical design violations, including: DRC, DFM, LVS, ANT, ERC etc.;

- Experience in chip level physical verification is preferred;

- Basic knowledge/experience of the physical implementation and static timing analysis;

- Bachelor or above degree in majors of EE/CS/IT, with more than 3 years’ work experience;

- Good ability of effective learning and independent thinking;

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- Good ability of communication and teamwork;

- Carefulness, responsibility and persistence.

We’re doing work that matters. Help us solve what others can’t.

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At a glance

  • Employment typeFull time
  • SeniorityLead / Principal
  • Employer posted
  • Added to ROLIVA
  • Last checked

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