Cadence

Lead Product Validation Engineer

Taiwan · Work style not stated · Full time

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About the role

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EmployerCadence
LocationTaiwan
Work styleWork style not stated
Employment typeFull time
Employer posted1 Oct 2026

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

We offer amazing opportunities to grow, no matter where you are in your career.

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

The Cadence Advantage

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The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.

Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.

The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success

Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests

You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.

Job Responsibilities

System level validation of features across HSV Palladium, Protium, and Solutions Products/Protocols for assigned flows
Develop and execute validation plans, test specifications, and regression strategies.
Analyze regression failures and drive issue resolution with R&D teams.
Develop, maintain, and support automated test harness and environments for HSV MMP/Solutions products.
Support release readiness activities, weekly releases, EHF releases, and ISR validation.
Participate in customer issue reproduction, debug, and validation activities.
Track quality metrics, coverage, and release risks.

Expected Technical Skills

Strong SystemVerilog/UVM verification knowledge.
Debugging and failure analysis skills.
Linux/Unix environment proficiency.
Scripting experience (Python, Tcl, Shell).
Jira/CCR workflow knowledge.
Test automation and regression infrastructure experience.
Understanding of emulation/prototyping platforms and validation flows.

Job Expectations

Independently own medium to large validation projects.
Create validation strategies and test plans with minimal supervision.
Drive cross-functional issue resolution with R&D, Release, PE, and Customer teams.
Improve productivity through automation and process improvements.
Present status, risks, and quality metrics to management.

Desired Experience

BS/MS in EE, CE, or CS.
Several years of verification/validation experience.
Experience with protocol/IP validation, software validation, or system-level testing.
Strong written and verbal communication skills.

We’re doing work that matters. Help us solve what others can’t.

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