Power Technology Development Integration Intern (Jan-Jun 2027)

Summary of Role:

We are looking for a Power Technology Development Integration Internto support the development and characterization of our latest 55BCDL-Gen2 technology. You will gain hands-on experience in semiconductor process integration, device and SRAM characterization, yield analysis, physical failure analysis (SEM/TEM), and process optimization. Working closely with engineers, you will help evaluate device performance, identify improvement opportunities, and contribute to process and design enhancements to meet product requirements.

Essential Responsibilities include:

Support the development and characterization of the latest 55BCDL-Gen2 technology, with a focus on process integration optimization and performance improvement.

Develop an understanding of Core, I/O, and SRAM device architectures, including electrical characteristics and reliability requirements.

Perform SRAM yield analysis to identify yield detractors and recommend improvement opportunities.

Process physical analysis, such as SEM, TEM, Correlation of physical characteristics to electrical and reliability performance.

Process stability evaluation and optimization, such as inline/ET Cpk. ET Vs inline analysis.

To propose for process and design optimization for devices to meet product requirements

Other Responsibilities:

Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Securityrequirementsand programs.

Required Qualifications:

Education–Actively pursuinga Bachelor's degree in Electrical Engineering, Physics, Materials Science, Chemical Engineering or equivalent.

Mustbe ingood academic standing.

Ability to workat least40hoursper week during the internship.

Available for a 16–24 week credit-bearing internship commencing January 2027.

Preferred Qualifications:

Prior related internship or co-op experience.

Demonstrated prior leadership experience in the workplace, school projects, competitions, etc.

Project management skills, i.e., the ability to innovate and execute on solutions that matter; the ability to navigate ambiguity.

Candidates with some Knowledges of device physics and CMOS process integration will be preferred.

*Pleaseindicateyour internship period clearly in your CV / resume / cover letter*

#InternshipProgramSGP

#InternshipProgram

GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency, and innovation whilst our employees feel truly respected,valuedand heard.

As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities.

All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations.

No Recruitment Fee Policy: GlobalFoundries is committed to ethical and transparent hiring practices.Candidates will not be charged any fees at any stage of the recruitment process. Any request for payment related to a GlobalFoundries employment opportunity is unauthorized and should be reportedimmediately.

All legitimate recruitment communications are conducted exclusively through official GlobalFoundries channels. To report concerns or suspected recruitment fraud, please contact our Ethics & Compliance Office atglobal.compliance@GlobalFoundries.comor visit our official website.

Information about our benefits you can find here: https://gf.com/about-us/careers/opportunities-asia