NXP
Principal Digital IP Verification Engineer
United States · Work style not stated · Full time
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About the role
Description from the employer’s posting. Check the employer’s page for the current version.
- EmployerNXP
- LocationUnited States
- Work styleWork style not stated
- Employment typeFull time
- Employer posted
About the Role
This position is within the MME MCU/MPU Digital IP team. We develop best-in-class digital IPs for NXP’s automotive and advanced microcontroller businesses, delivering sensor and processing technologies that enable secure, connected vehicles today and autonomous vehicles of the future.
Job Summary
Define and execute verification plans
Develop and implement verification testbenches
Develop testbench components such as drivers, monitors, and scoreboards, and leverage advanced UVM VIPs
Develop directed and constrained-random stimulus
Analyze RTL, functional coverage, and assertion coverage results
Define and develop functional coverage models
Develop and maintain SystemVerilog assertions (SVA)
Apply formal verification methodologies
Demonstrate strong debugging skills, including failure reproduction and root-cause analysis
Show full description
Exhibit strong analytical and problem-solving skills; familiarity with major simulation and debug tools is a plus
Key Responsibilities
Drive a “zero-defect” mindset across the verification team
Provide technical leadership and guidance on complex verification challenges
Mentor and grow a small team of engineers
Cross-Functional Collaboration
Partner with local and global SoC and IP teams to drive best practices and continuous productivity improvements
Demonstrate outstanding problem-solving and analytical capabilities
Qualifications
BSEE with 8+ years of semiconductor industry experience, or
MSEE with 5+ years of experience, or
PhD with 3+ years of experience
Technical Skills
Knowledge of protocols such as DDR, PCIe, AMBA (CHI, ACE, AXI)
Strong expertise in Verilog, SystemVerilog (VHDL is a plus)
Experience with OVM/UVM and class-based verification methodologies
Experience with formal verification methodologies
Experience leveraging AI/LLM-based approaches to improve engineering efficiency
Test pattern debugging and validation on simulation and automated test environments
Low-power verification using CPF/UPF
Scripting in Python, Perl, and UNIX/Linux
Experience with FPGA/emulation/prototyping platforms (e.g., HAPS, Palladium, Zebu) is a plus
Understanding of power management concepts
Familiarity with functional and code coverage methodologies
Location
Austin, TX (Hybrid)
More information about NXP in the United States...
NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.
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At a glance
- Employment typeFull time
- SeniorityLead / Principal
- Employer posted
- Added to ROLIVA
- Last checked
Skills in this posting
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