Senior Manager, Digital Design Engineering

Key Responsibilities

Technical Leadership

• Lead digital RTL design for complex IP blocks and chip-top/subsystem integration.
• Drive key architecture and micro-architecture decisions, including performance, power, area, timing, reliability, and integration trade-offs.
• Own digital design execution from architecture definition through RTL delivery, synthesis readiness, timing closure support, and tape-out.
• Conduct regular design reviews to ensure high-quality implementation, robust documentation, and disciplined issue closure.

Project Execution

• Define and manage project plans, milestones, schedules, dependencies, and risk mitigation strategies for digital design activities.
• Proactively identify technical and cross-functional risks that may impact quality, schedule, or product objectives, and drive them to resolution.
• Partner closely with system, analog/mixed-signal, verification, firmware, physical design, test, and product engineering teams to ensure smooth SoC integration and execution.

Team Leadership

• Lead, mentor, and grow a high-performing digital design team by providing technical direction, execution guidance, and career development support.
• Foster a culture of technical excellence, ownership, collaboration, accountability, and continuous improvement.
• Improve team processes, review practices, and design methodology to strengthen execution efficiency and engineering quality.

Required Qualifications

• M.S. or Ph.D. degree in Microelectronics, Electrical Engineering, Computer Engineering, or a related field.
• 8+ years of experience in digital IC or SoC design, with demonstrated ownership of complex IP blocks, subsystems, or full-chip designs.
• Strong hands-on expertise in digital architecture, RTL design, micro-architecture definition, and mixed-signal SoC integration.
• Solid understanding of digital design flows, including synthesis, static timing analysis, clock/reset strategy, CDC/RDC considerations, and physical implementation handoff.
• Good understanding of block-level and system-level verification methodologies, with the ability to collaborate effectively with verification teams on coverage, debug, and sign-off readiness.
• Proven experience leading projects and managing engineers, with a clear track record of driving execution, resolving technical challenges, and delivering through major milestones.
• Excellent communication and stakeholder-management skills, with the ability to align technical teams and communicate clearly across global cross-functional organizations.
• Self-driven, resilient, and comfortable operating in a fast-paced AI data center product development environment.
• Strong written and verbal English communication skills.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

Required Travel: Yes, 10% of the time

Shift Type: 1st Shift/Days