Renesas Electronics
Sr Staff Digital Design Engineer
Catania, Italy · On-site · Full-time
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About the role
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- EmployerRenesas Electronics
- LocationCatania, Italy
- Work styleOn-site
- Employment typeFull-time
- Employer posted
We are looking for a talented Snr Staff Digital Design Engineer with a BSc/MSc in Electrical/Computer Engineering (EE/ECE) and industry experience of 8-12 years. Successful candidate will be reporting to the Snr Manager of Design Engineering.
Our team works on the most advanced digital power management ICs in the industry. This is an excellent full-time/permanent role giving the opportunity to work with an expert team pushing the envelope of digital design, verification, debug, simulation, and automation script development and thus contributing to industry leading chips.
Job Duties:
- Develop, debug, and verify digital designs in pre and post silicon environment
- Write tests to verify bulk design intent as per specification.
- Learn, develop and improve scripts to facilitate design automation flows.
- Manage assigned design blocks in design requirements, architecture, and implementation
- Research and present new tools in aid of design development process
- Act as technical mentor for junior engineers.
- Represent digital design as functional digital design lead in design projects.
Show full description
- BSc/MSc in Electrical Engineering/Computer Engineering (EE/ECE) and 8-12 years of relevant industry experience
- Prior design project work experience showing collaborative and innovative thinking
- Proficient in developing CDC / RDC / LINT clean designs in Verilog
- Comfortable with debugging mixed-signal designs in System Verilog based test benches
- Exposed to gate level simulation debug.
- Experience in designing industry standard serial interfaces (I2C, I3C, SPI, I2S etc)
- Strong analytical skills and debug methodology
- Good written and verbal communications skills
- Working experience with Cadence or Synopsys design tool flows.
- Hands-on technical leadership role resulting in successful projects.
Preferred skills:
- Proficient in scripting languages such as Python/Perl
- Knowledge of ARM cortex M-series processor and computer architecture in general.
- Exposure to mixed signal designs w/ basic understanding of analog circuits.
- Experience in digital backend design flow (synthesis / STA / P&R)
- Full design flow experience (specification, micro-architecture, RTL implementation, backend implementation).
The expected annual pay range for this position is €61,000–€82,000. Please note that the final offer will depend on factors such as geographic location, relevant experience, and the candidate’s skill set. This role is also eligible for a bonus.
Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.
At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.
We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.
Are you ready to join our team and shape the future with us?
Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.
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At a glance
- Work styleOn-site
- Employment typeFull-time
- SeniorityMid level
- Employer posted
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