Stage Ingénieur : Conception Numérique IP et Circuit Intégrés (F/H)

Vos Missions

Le(a) stagiaire prendra en charge et réalisera les missions suivantes :

• Etude des solutions existantes utilisées dans les circuits intégrés BMS (Battery Management System). Travail en équipe.
• Implémentation de la solution en verilog synthétisable avec utilisation des outils conception (syntaxe et règles de codage, synthèse logique, testabilité, asynchronismes, contraintes de timing, analyse de consommation, surface silicium et contraintes de placement).
• Mise en place d’un testbench System Verilog et vérification des différentes configurations possibles avec les outils de simulation. Ecriture des assertions afin de garantir la fonctionnalité de l’IP par preuve formelle.
• Rédaction d’un document justifiant les différents choix de conception RTL ainsi qu’un guide d’intégration pour faciliter l’utilisation dans un SoC (System on Chip).

Votre Profil

• Niveau d’études : Bac + 5, dernière année d’école d’ingénieur en microélectronique (option numérique).
• Bonnes connaissances des system on chip et intégration d’IP.
• Connaissances en description hardware RTL et environnement de vérification.
• Langages VHDL ou Verilog, systemVerilog, C ou systemC.
• Outils de synthèse logique et de simulation.
• Notions de preuve formelle.
• Scripting en tcl, python et shell.
• Un bon niveau d’anglais est exigé. Travail en équipes internationales multi-site

Context

NXP Design Center in Toulouse is designing Mixed-Signal ICs for Automotive in several domains: Power Management for MCU, Battery Management System, Sensors and Radar.

The Digital Design team in this organization, is in charge to design logic interfaces with the analog blocks. The main functions are power management state machines, communication link with the external microcontroller, RISC integration, digital filtering and large signal processing using memory (OTP and RAM).

The team do the architecture, the implementation, the verification, the synthesis and layout in ASIC gates. It includes also the design for test part that detects the defect during production. The validation of the functionality is done on silicon with the mixed-signal part.

We are looking for an intern for Battery Management Systems group.

Your Responsibilities

The intern will be in charge of the following tasks:

• Study of existing solutions used in integrated circuits BMS (Battery Management System). Team work.
• Implementation of the solution in synthesizable verilog with the use of the associated tools (syntax and coding rules, logic synthesis, testability, asynchronisms, timing constraints, consumption analysis, silicon area and placement constraints).
• Implementation of a System Verilog testbench and verification of the different possible configurations with simulation tools. Writing assertions to guarantee the functionality of the IP by formal proof.
• Writing of a document justifying the different RTL design choices as well as an integration guide to facilitate use in a SoC (System on Chip).

Your Profile

• BSEE, MSEE preferred, in micro-electronics (digital design).
• Good knowledge in System on Chip (IP design and integration).
• Coding and design with hardware description language.
• Knowhow in verification flow of an ASIC.
• Languages: VHDL or Verilog, SystemVerilog, C or SystemC.
• Tools: logic synthesis and simulation.
• Basic knowledge on Formal Verification.
• Scripting: tcl, python and shell.
• A good level of English is required, working in an international multi-site team.

More information about NXP in France...

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