NXP
Stage Ingénieur : Vérification de Performance et Modélisation de Systèmes sur Puce (SoC) (H/F)
France · Work style not stated · Full time
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About the role
Description from the employer’s posting. Check the employer’s page for the current version.
- EmployerNXP
- LocationFrance
- Work styleWork style not stated
- Employment typeFull time
- Employer posted
Contexte
Les systèmes sur puce (SoC) modernes intègrent plusieurs processeurs, accélérateurs matériels, sous-systèmes mémoire et interconnexions complexes. Avant même la disponibilité complète du matériel, il est essentiel d'évaluer les performances du système afin de vérifier que les objectifs d'architecture sont atteints en termes de débit, bande passante et latence.
L'objectif de ce stage est de développer un modèle de performance permettant de représenter différents composants du SoC (cœurs processeurs, accélérateurs, mémoires, interconnexions) et de simuler leur comportement sous différentes configurations et charges de travail.
Missions
Étudier l'architecture d'un SoC complexe et identifier les paramètres influençant les performances.
Développer des modèles abstraits de composants matériels (CPU, accélérateurs, mémoires, interconnexions).
Show full description
Définir des scénarios de trafic et des charges de travail représentatifs des cas d'utilisation réels.
Simuler différents scénarios afin d'évaluer le comportement du système.
Extraire et analyser les indicateurs de performance clés (KPI) :
Débit (Throughput)
Bande passante (Bandwidth)
Latence
Niveau de contention des ressources
Identifier les goulots d'étranglement et proposer des pistes d'optimisation.
Développer des outils d'automatisation pour la collecte et l'analyse des résultats.
Présenter les résultats aux équipes d'architecture et de vérification.
Profil recherché
Élève ingénieur électronique ou systèmes embarqués.
Bon niveau en programmation Python.
Connaissances en architecture des processeurs et systèmes embarqués.
Intérêt pour la modélisation, la simulation et l'analyse de performances.
Esprit d'analyse et curiosité technique.
Context
Modern System-on-Chip (SoC) devices integrate multiple processing cores, hardware accelerators, memory subsystems, and complex interconnect architectures. Early performance assessment is critical to ensure that architectural targets are met before the complete hardware implementation becomes available.
The objective of this internship is to develop a performance modeling framework capable of representing different SoC components (CPU cores, accelerators, memories, and interconnects) and simulating their behavior under various configurations and workloads.
Responsibilities
Study a complex SoC architecture and identify key performance drivers.
Develop abstract performance models for processors, accelerators, memories, and communication fabrics.
Define realistic traffic patterns and workload scenarios.
Simulate different system configurations and use cases.
Extract and analyze key performance indicators (KPIs), including:
Throughput
Bandwidth utilization
Latency
Resource contention
Identify system bottlenecks and propose optimization opportunities.
Develop automation tools for performance data collection and analysis.
Generate reports and present results to architecture and verification teams.
Required Qualifications
engineering student in Electronics, Embedded Systems, or a related field.
Strong programming skills in Python.
Basic knowledge of computer architecture and embedded systems.
Interest in system modeling, simulation, and performance analysis.
Analytical mindset and strong problem-solving skills.
Preferred Skills
Experience with C/C++.
Familiarity with SystemC, TLM, or performance simulation methodologies.
Knowledge of SoC architectures, memory hierarchies, and interconnects.
Experience with data analysis and visualization tools.
More information about NXP in France...
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At a glance
- Employment typeFull time
- Employer posted
- Added to ROLIVA
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Skills in this posting
Skills ROLIVA found in the employer’s own description above. A mention is not a requirement.